Technology – Power Management

2011 TGS Presentation

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Power Management (PM)

Our differentiated and industry leading Bi-polar-CMOS-DMOS (BCD) power management platform offers 0.5- to 0.18-micron CMOS density and a combination of bipolar NPN and PNP devices, as well as high voltage CMOS and DMOS FETs for use in complex power management chips including driver ICs, battery and portable power management, power control for PC products, Class-D audio amplifiers, and many other consumer, communications and computing applications.

Our continuously customizable LDMOS from 20V to 80V process provides design optimization and the lowest die size at any given breakdown voltage. The integration of a one to zero layer addition Non-Volatile Memory (NVM) provides significant differentiation and cost effectiveness for enhanced power management solutions. Our patented Y-Flash is the leading solution for NVM in the market today due its small cell size, zero mask adder and flexibility to implement various memory sizes.

NVM blocks that utilize this proprietary technology include array sizes that are up to five times smaller than other competitive solutions and can be built using only one gate oxide allowing for ultra low cost designs. Our power management roadmap includes devices to 700V for the next generation digital lighting.