CMOS IMAGE SENSORS
Cutting Edge Imaging Solutions Customized for Your Needs
Tower Semiconductor advanced and proven CMOS image sensor technology meets the growing demand for optical sensors used in industrial, medical, high-end photography, automotive and consumer applications, including high end smartphones 3D cameras.
Tower Semiconductor’s worldwide recognized leadership in CMOS image sensors and pixel technology is derived from its vast experience and proven ability to supply sensors with best-in-class performance, customized to fit exactly your products and applications needs.
We provide our customers with robust, reliable manufacturing capabilities combined with unique customizations enabling unmatched pixel design performance with no compromise on quality. The company’s extensive expertise in the imaging field combined with in-house CIS technology development enables Tower Semiconductor to meet the market’s rigorous requirements for leading-edge performance, advanced features, and versatile die sizes, from millimeter square devices to full 12’’ wafer scale single dies.
Tower Semiconductor’s long-term investment in R&D and technical support keeps it at the cutting edge of CIS technology. By choosing Tower Semiconductor’s mature process, customers benefit from skilled experts who work to customize designs and provide rich solutions to meet their requirements and project needs. Tower puts a very strong emphasis on customer support and accompany its partners through the entire product life cycle.
Tower Semiconductor’s CIS technology is offered on three different platforms:
- 8” wafers, 180nm with aluminum backend – Frontside and Backside illumination and Stacked to 180nm or 130nm
- 12” wafers, 65nm with copper backend – Frontside and Backside illumination and Stacked
Stitching technology is available on both 180nm and 65nm platforms, BSI and FSI and on some stacking options (both two-mask and one-mask stitching).
Core Technology Node | Wafer Size | Backend | BSI/FSI | Stiching | Note |
|---|---|---|---|---|---|
180nm | 8’’ | Al | BSI/
FSI | 1D/2D | |
180nm stacked | 8’’ | Al | BSI | Stacked to 180nm or 65nm with coring | |
65nm | 12″ | Cu | FSI/ BSI | 1D/2D | |
65nm stacked | 12″ | Cu | BSI | 1D/2D to 65nm | Stacking to multiple nodes, including 3rd party digital wafers |
CMOS Image Sensor
Markets Served
Tower Semiconductor CMOS Image Sensor Technolofgy Main Features
Pixel Offering Mapping
Tower Semiconductor offers a wide and unique range of pixels sizes and features tailored for the most demanding applications.
Extensive Pixel Portfolio
180nm Pixel Offerings
Pixel Size [um] | Process Node | Market | Technology |
|---|---|---|---|
15-300 | FSI | Medical | RS |
3.6-6 | FSI | Cinema | RS |
4-6 | FSI | Broadcast | GS |
3.6-20 | FSI/BSI | Machine Vision | GS |
15< | FSI/BSI | Automotive | SPAD/DTOF |
5< | FSI/BSI | 3D, Gesture, AR, VR | iToF |
65nm Pixel Offerings
Pixel Size [um] | Process Node | Market | Technology |
|---|---|---|---|
10< | BSI Stacked | Automotive | SPAD/DTOF |
3.2-6 | FSI/BSI & Stacking | DSLR/cinema | RS |
1.25-3.6 | FSI/BSI & Stacking | Security/Broadcasting | RS |
1.25-1.75 | FSI | Consumer/Medical | RS |
2.5-5 | FSI | AR, VR, Face Recognition | GS, iToF, Time gating |
2.2-2.74 | BSI & Stacking | AR/VR/Machine Vision | GS |
180nm (Aluminum backend), BSI/FSI/Stacked
- Most mature and flexible 1.8/3.3V and 1.8/5V CMOS platforms
- Wide range of pixel architectures and technologies
- FSI thin backend and reduced backend
- BSI for improved QE
- In-house Color Filter Array (CFA) and gap-less µ-lenses
- Full modularity of process options
- 1D and 2D stitching to enable large sensors up to 1 die per wafer
- Short Wave infrared with Germanium on Silicon technology
State of the art 65nm (Copper backend), BSI/FSI/Stacked
- Ultra-thin backend and dual light pipe for best in class angular response
- BSI and Stacked BSI for reduced cost and improved QE
- Best-in-class GS (Global Shutter) charge-domain pixels having very high shutter efficiency
- World smallest GS Charge domain pixel 2.2um in production
- 1D and 2D stitching to enable large sensors (up to 1 die per wafer)
- Special stitching mode using two mask sets
- Pixel level Cu-Cu stacking at a pitch of less than 2um
A comprehensive technology choice to tailor the process to your application
